• Test Chip EDA&IP
  • SmtCell Powerful Parameterized Cell Layout Design Platform
  • TCMagic Conventional Testchip Layout Automation Design Platform
  • ATCompiler Addressable Testchip Layout Automation Design Platform
  • Addressable IP Addressable Test Chip
  • ICSpider Automated Tool to Design Product-based Testchips
  • Dense Array Ultra-high-density Testchip
  • HDYS High Density Yield Scribeline
• Data Analytics
  • DE-G General Semiconductor Data Analysis
  • DE-YMS Fab Inline and Yield Data Analysis
  • DE-DMS Defect Management Analysis System
  • INF-AI One-stop AI Solution Platform for Semiconductor Manufacture
  • INF-ADC Automatic Defect Classification System
  • INF-WPA An Intelligent and Efficient Platform for Wafer Pattern Analysis
  • DE-RF RF Data Analysis Software
  • DE-FDC Equipment Monitoring System
  • DE-SPC Statistical Process Control System
  • DE-Alarm An Intelligent Yield and Quality Anomaly Detection and Alarming System
  • DE-iCASE AI Empowered Defect Analysis/ Case Tracking System Platform
• DFM Software
  • CMPEXP Efficient CMP Modeling and Simulation Tool
  • Virtual Yield Chip Yield Modeling Tool
• DFT Software
  • DFTEXP Design for Testing Automation & Yield Diagnostics

Wafer-Level Parametric Testers
• WAT Tester
  Provides accurate and highly automated testing solutions
• WLR Tester
  Check whether the device can maintain high consistency in electrical specifications
• Process Development Tester
  Utilized in the research and development stage to improve testing efficiency and accuracy

• Yield Ramp Service
  Customized services for new process node development
• DFT Design Service
  Enhances the testability of chips by inserting test circuits into the chip design